Vishay Intertechnology, Inc. (NYSE: VSH) today introduced a new 60 V TrenchFET Gen IV n-channel power MOSFET that is the industries first optimized for standard gate drives to deliver maximum on-resistance down to 4 mΩ at 10 V in the thermally enhanced 3.3 mm by 3.3 mm PowerPAK® 1212-8S package. Designed to increase efficiency and power density in switching topologies, the Vishay Siliconix SiSS22DN features a low gate charge of 22.5 nC along with low output charge (QOSS).
Unlike logic-level 60 V devices, the typical VGS(th) and Miller plateau voltage of the SiSS22DN are enhanced for circuits with gate drive voltages above 6 V, where the device provides optimized dynamic characteristics that enable short dead-times and prevent shoot-through in synchronous rectifier applications. The SiSS22DN’s industry-low on-resistance is 4.8 % lower than the next best product — and rivals the leading logic-level device — while its QOSS of 34.2 nC results in the best in class QOSS times on-resistance, a critical figure of merit (FOM) for MOSFETs used in power conversion designs employing zero voltage switching (ZVS) or switch-tank topology. To achieve higher power density, the device utilizes 65 % less PCB space than similar solutions in 6 mm by 5 mm packages.
The SiSS22DN’s specifications are fine-tuned to minimize conduction and switching losses simultaneously. The result is increased efficiency that can be realized in multiple power management system building blocks, including synchronous rectification in AC/DC and DC/DC topologies; primary-side switching in DC/DC converters, half-bridge MOSFET power stages in buck-boost converters, and OR-ing functionality in telecom and server power supplies; motor drive control and circuit protection in power tools and industrial equipment; and battery protection and charging in battery management modules.
The MOSFET is 100 % RG– and UIS-tested, RoHS-compliant, and halogen-free.
Samples and production quantities of the SiSS22DN are available now, with lead times of 30 weeks subject to market conditions.
