
Numem, an innovator focused on accelerating memory for AI workloads, will be at the upcoming Chiplet Summit to showcase its high-performance solutions. By accelerating the delivery of data via new memory subsystem designs, Numem solutions are re-architecting the hierarchy of AI memory tiers to eliminate the bottlenecks that negatively impact power and performance.
The rapid growth of AI workloads and AI Processor/GPU is exacerbating the memory bottleneck caused by the slowing performance improvements and scalability of SRAM and DRAM – presenting a major obstacle to maximizing processor performance. To overcome this, there is a pressing need for intelligent memory solutions that offer higher power efficiency and greater bandwidth, coupled with a reevaluation of traditional memory architectures. Numem is redefining traditional memory paradigms with its advanced SoC Compute-in-Memory solutions. Built on its patented NuRAM (MRAM-based) and SmartMem technologies, these innovations tackle critical memory challenges head-on. The result is a groundbreaking approach to scalable memory performance, designed specifically for the demands of HPC and AI applications.
“Numem is fundamentally transforming memory technology for the AI era by delivering unparalleled performance, ultra-low power, and non-volatility,” said Max Simmons, CEO for Numem. “Our solutions make MRAM highly deployable and help address the memory bottleneck at a fraction of the power of SRAM and DRAM. Our approach facilitates and accelerates the deployment of AI from the data center to the edge – opening up new possibilities without displacing other approaches.”
MRAM-Based Chiplet Solution
At the Summit, Numem will preview its innovative chiplets – nonvolatile, high-speed, ultra-low power solutions that leverage MRAM to overcome memory challenges in chiplet architectures. Sampling is expected to begin in late Q4’25.
Key features and benefits include:
- Unparalleled Bandwidth: Delivers 4TB/s in 2026 per 8-die memory stack, far exceeding existing AI memory solutions like HBM4 and UCIe.
- High Capacity: Supports up to 4GB per stack package in 2026, enabling scalability for demanding AI workloads.
- Nonvolatile with SRAM-Like Performance: Combines ultra-low read/write latency with persistent data retention, offering unmatched reliability and efficiency. Provides the scalability and power needed to address the demands of future AI and data-centric workloads.
- Power Smart: Game-changing power efficiency and AI Edge and Data Cetner based solutions ability to implement multi-state flex power functions (active/standby/deep sleep).
- Broad Application Compatibility: Optimized for AI applications across OEMs, hyperscalers, and AI accelerator developers to drive the adoption of chiplet-based designs in high-growth markets. Designed with standard industry interfaces such as UCIe to facilitate ecosystem compatibility.
- Advanced Integration: Complement other chiplet components (e.g., CPUs, GPUs, and accelerators), enhancing the performance and efficiency of the overall system.
- In-Compute Intelligence: Makes memory smarter by helping to manage incoming data, read/write times, programable power management, and self-testability.
- Proven Technology: State-of-the-art memory subsystem IP based on proven foundry MRAM process.
Numem will also demonstrate its patented NuRAM/SmartMem technology, which achieves significantly faster speeds and lower dynamic power consumption compared to other MRAM solutions. It reduces standby power by up to 100x compared to SRAM, with similar bandwidth, and delivers 4-6x faster performance than HBM while operating at ultra-low power.
Demonstrations will be given in Numem’s booth #322 on the show floor of the Santa Clara Convention Center from January 21-23. Please visit https://www.numem.com for more information.