Dev Kit & Neural Network IP for Easily Creating Low-Power FPGA

Microchip Technology VectorBlox Accelerator Software Development Kit (SDK) helps developers take advantage of Microchip’s PolarFire FPGAs for creating low-power, flexible overlay-based neural network applications without learning an FPGA tool flow. 

FPGAs are ideal for edge AI applications, such as inferencing in power-constrained compute environments, because they can perform more giga operations per second (GOPS) with greater power efficiency than a central processing unit (CPU) or graphics processing unit (GPU), but they require specialized hardware design skills.

Microchip’s VectorBlox Accelerator SDK is designed to enable developers to code in C/C++ and program power-efficient neural networks without prior FPGA design experience.

Unlike alternative FPGA solutions, the tool kit supports Linux and Windows operating systems, and it also includes a bit accurate simulator which provides the user the opportunity to validate the accuracy of the hardware while in the software environment. The neural network IP included with the kit also supports the ability to load different network models at run time.

In order for software developers to benefit from the power efficiencies of FPGAs, we need to remove the impediment of them having to learn new FPGA architectures and proprietary tool flows, while giving them the flexibility to port multi-framework and multi-network solutions,” said Bruce Weyer, vice president of the Field Programmable Gate Array business unit at Microchip. “Microchip’s VectorBlox Accelerator SDK and neural network IP core will give both software and hardware developers a way to implement an extremely flexible overlay convolutional neural network architecture on PolarFire FPGAs, from which they can then more easily construct and implement their AI-enabled edge systems that have best-in-class form factors, thermals and power characteristics.”

For inferencing at the edge, PolarFire FPGAs deliver up to 50 percent lower total power than competing devices, while also offering 25 percent higher-capacity math blocks that can deliver up to 1.5 tera operations per second (TOPS).

By using FPGAs, developers also have greater opportunities for customization and differentiation through the devices’ inherent upgradability and ability to integrate functions on a single chip. The PolarFire FPGA neural network IP is available in a range of sizes to match the performance, power, and package size tradeoffs for the application, enabling customers to implement their solutions in package sizes as small as 11 × 11 mm.

Microchip’s VectorBlox Accelerator SDK is scheduled to be available in the third quarter of 2020, starting with an Early Access Program in June. PolarFire FPGAs are in production today.