Synopsys DesignWare IP achieves multiple First-Pass Customer Silicon successes on TSMC’s N5 Process

High-Quality Interface & Foundation IP Adopted by More Than 20 Leading Semiconductor Companies, Across Range of Automotive, Mobile & High-Performance Computing Markets

Synopsys, Inc. announced that its broad DesignWare Interface, Logic Library, Embedded Memory and PVT monitor IP solutions have enabled customers to achieve multiple first-pass silicon successes on TSMC’s N5 process, across more than 20 leading semiconductor companies. Companies have selected the DesignWare IP solutions to meet the stringent power, performance and area (PPA) requirements for their advanced automotive ADAS and infotainment, AI accelerator, server, networking and mobile system-on-chip (SoC) designs. By achieving broad adoption of its DesignWare IP and VC Verification IP with multiple customer silicon successes, Synopsys enables designers to integrate the IP with confidence and significantly lower SoC integration risk.

TSMC’s close collaboration with Synopsys, our long-standing ecosystem partner, enables our mutual customers to benefit from a broad portfolio of high-quality IP on TSMC’s advanced process technologies,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. “Synopsys’ DesignWare IP on TSMC’s N5 process, the most advanced foundry solution available with the best PPA, allows designers to quickly deliver differentiated products and ramp to volume production, while fully benefiting from the advanced process.”

Synopsys has collaborated with TSMC for decades to deliver feature-rich, silicon-proven IP that enables designers to meet the data intensive demands of automotive, high-performance computing and AI designs on TSMC’s most advanced processes including N5 with a strong roadmap for N3,” said John Koeter, senior vice president of Marketing and Strategy for IP at Synopsys. “The broad adoption of our DesignWare IP portfolio on TSMC’s N5 process demonstrates our customers’ continued trust in Synopsys’ IP, enabling them to reduce integration risk and get their products to market faster.”

Synopsys’ broad DesignWare IP portfolio includes logic libraries, embedded memories, IOs, PVT monitors, embedded test, analog IP, interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Our extensive investment in IP quality and comprehensive technical support enable designers to reduce integration risk and accelerate time-to-market. For more information, please visit

Availability and Resources

  • DesignWare IP on TSMC N5 process available now: eUSB2, USB 2.0, USB 3.1, USB-C 3.1, USB-C 3.1/DP, PCIe 3.0/5.0, 112G Ethernet, HBI Die-to-Die, LPDDR5/4/4X, DDR5/4, HBM2E, MIPI C-PHY/D-PHY, Multi-Protocol 32G PHY, Logic Libraries, Embedded Memories, and In-Chip Sensing and PVT Monitoring
  • DesignWare IP on TSMC N5 process available in the second half of 2021: DesignWare IP for USB-C 3.2, USB 4.0, PCIe 4.0, 112G USR/XSR Die-to-Die, Multi-Protocol 16G PHY, HDMI 2.1, DisplayPort, MIPI M-PHY
  • For more information, visit DesignWare IP portfolio.