Abstract
This article provides an in-depth overview of GMSL technology, focusing on the differences between pixel and tunnel modes for video data transmission. It will clarify the main differences between these two modes and will explore the specific considerations required for effective implementation.
Quick Overview of GMSL
Gigabit Multimedia Serial Link (GMSL) is a proprietary SERDES technology from Analog Devices designed for high speed video data transmission over an extended range using a single coaxial cable or two shielded twisted pair (STP) cables. Initially developed for automotive applications due to its robustness against electromagnetic interference (EMI) and lighter cable harnesses, GMSL is now also widely adopted in other segments such as industrial, agricultural, medical, and much more.
Presently, there are three GMSL generations available: GMSL1, GMSL2, and GMSL3. A detailed deep dive into the differences between these three is outside the scope of this article. However, some details that help to better understand the content of this article are highlighted:
- The technical details and features described in this article do not apply to the GMSL1 generation.
- While the complete GMSL portfolio supports video data transmission between multiple types of video interfaces (parallel, camera serial interface 2 (CSI-2®), HDMI®, oLDI, etc.), the information presented in this article is relevant for those GMS components that support CSI-2.
Figure 1 shows an example of what a basic GMSL-enabled network looks like. The SERDES are placed in between a video source and a video sink, allowing for much greater distances to be achieved between the two while reducing the number of necessary cables.
The video sources can be either sensors or processing units, while the video sink can be represented either by displays or other processors.
Bridging Video Interfaces: CSI-2
CSI-2 is a high speed video interface standardized by the Mobile Industry Processor Interface (MIPI) Alliance. It is used in many applications such as automotive, mobile, drones, robotics, etc. Usually, the CSI-2 video source consists of sensors (imagers, radars, LIDARs) and the video sink represents a processing unit, a system on chip (SoC), a microcontroller, etc.
CSI-2 is a protocol specification that defines how the image data is formatted, received, and transmitted and uses D-PHY™ or C-PHY™ as hardware layers. These two are distinct physical layer interfaces defined by the MIPI Alliance that describe the electrical characteristics, signal integrity, and timing characteristics required for high speed data transmission.
To keep it short and simple:
- C-PHY can support higher bandwidth applications than D-PHY. Each PHY uses different data and clock lane topologies requiring different layout considerations.
- The CSI-2 packet structure comprises three main segments: header, payload, and footer. With mild differences, this structure applies to both C-PHY and D-PHY.
- The header contains secured information about the content of the payload. This lets the receiver know what type of data to prepare for.
- The payload consists of the main information that needs to be transmitted.
- The footer secures the payload information, via CRC checksums.
SERDES Video Data Transmission
In a GMSL system, the CSI-2 packets are received by the serializer, encoded into the GMSL packet format, and delivered over the cable to a pairing deserializer that unpacks the video and sends the CSI-2 information to a local processor.
With the evolution of GMSL CSI-2 components, two distinct modes for video data transmission have emerged. While both will ensure a safe and reliable transmission of the video content across the GMSL link, the particularities between them should be considered. The two modes of transmission are pixel mode and tunnel mode.
Pixel mode is the legacy mode of transmission, which was introduced with the first families of GMSL2 products. As depicted in Figure 2, in this mode, the incoming CSI-2 packet header and footer are removed, and the data payload is converted to pixel format to be sent across the GMSL link. The conversion between CSI-2 format to pixel format is done in the serializer, while on the other side of the link, at the deserializer level, the CSI-2 structure is reconstructed and a new header and footer are added to the structure.
Tunnel mode, on the other hand, repacketizes the whole CSI-2 data structure as shown in Figure 3. Due to this, tunnel mode is sometimes referred to as CSI-2 forwarding and does not support any pixel-based processing.
The availability of either one or both transmission modes varies between GMSL components and is reflected in the respective data sheet.
For a successful GMSL link operation, both the serializer and deserializer must be supported and configured in either pixel or tunnel mode. Mismatching modes between the serializer and deserializer will fail to transmit video data. Other peripheral interfaces or protocols supported by the GMSL components such as I2C, UART, GPIOs, and so on would not be impacted.
Feature by Feature: Comparing Pixel and Tunnel Modes
Depending on whether pixel or tunnel mode is used, there are multiple particularities a system designer should be aware of when implementing a GMSL-based system. This section will highlight some of these.
All these particularities are a direct consequence of the CSI-2 packet structure itself and the type of information that can be found in the CSI-2 header and footer.
Data Integrity
GMSL communication is protected by its own checksum algorithm. In addition to this algorithm, the CSI-2 protocol calculates a 16-bit CRC over the data payload bytes and stores this information in the packet footer. The header information is not included in this checksum.
In pixel mode, the CSI-2 CRC information is checked and confirmed by the serializer, after which it is discarded. Once the video payload arrives at the deserializer, a new CSI-2 CRC is calculated, which will be checked by the processor upon receiving the data packages. This process is shown in Figure 4. By using both the CSI-2 and GMSL checksum, data integrity is ensured across the entire chain.
In tunnel mode, data integrity is enhanced as the original CRC from the sensor is sent all the way across the link to the processor. As depicted in Figure 5, the GMSL CRC is still present between the serializer and deserializer, ensuring higher redundancy.
In addition, in tunnel mode, an inline CRC check is also supported at the deserializer level, which can verify and optionally correct the CSI-2 header or payload CRC. The detected checksum mismatch can be reported using the error reporting feature. This enables faster error detection before data acquisition takes place at the SoC level.
In both pixel and tunnel mode, data integrity between the serializer and deserializer can be further improved by using the internal forward error correction (FEC) feature.
Aggregation
In the context of GMSL, aggregation refers to the capability to merge multiple video streams into a single output, enabling more optimal use of a video sink’s input pins.1 Figure 6 shows an example of aggregation using two single-input MAX96717 serializers and one dual-input MAX96716A deserializer.
The transmission modes are individually configured for each GMSL port. In Figure 6, both the serializers and input ports of the deserializer must be configured to operate in either pixel or tunnel mode. Aggregation is possible only between video streams that share the same mode of transmission.
In a mixed-use case, where one link operates in pixel mode and the other in tunnel mode, aggregation is not supported. In this scenario, the video streams will have to use different deserializer output ports as depicted in Figure 7.
MIPI Physical Layer
MIPI Translation
Additionally, when merging multiple video streams from two or more sensors into a single MIPI port, another issue may arise: the combined video data might exceed the 10 Gbps limit of D-PHY. To overcome this bottleneck and not impose many restrictions on the architectural design, D-PHY to C-PHY conversion over the video chain is ideal.
In pixel mode, only the CSI-2 data payload remains unchanged from source to sink and it has the same structure for both physical layers. This means that via GMSL, in pixel mode, the sink and source are agnostic to what type of PHY one or the other is using. Because the PHY packet structure only differs at the header and footer level, the incoming D-PHY structure can be deconstructed and then reassembled as C-PHY at the deserializer level without impacting the payload information.
This capability does not exist natively with tunnel mode; thus, the reason D-PHY to C-PHY translation is not supported in this mode.
There are, however, exceptions with one such example being the MAX96724/MAX96724F/MAX96724R quad-input CSI-2 deserializer family that supports up to four CSI-2 ports, either as a D-PHY or C-PHY configuration. It can be configured to operate either in pixel or tunnel mode. For the MAX96724 family, performing D-PHY to C-PHY conversion in tunnel mode without affecting the data integrity is possible.
Virtual Channel Management
Virtual channels are labels assigned to a CSI-2 packet, which are used to identify each data payload. They become even more relevant in applications using aggregation, as the receiving side needs to demultiplex multiple incoming streams and distinguish one from another. These labels are found inside the header segment of a CSI-2 packet.
As a direct consequence, pixel mode allows for custom virtual channel reassignments in the GMSL components. Not all parts supporting tunnel mode have this flexibility. In this case, each source will need to set unique virtual channels.
Schematic and Layout Implications
Pixel and tunnel mode feature protocol level differences that imply no meaningful modifications to an application’s schematic.
GMSL components can be programmed to power up by default in either pixel or tunnel mode. This default setup is achieved by using predefined resistor divider networks on the CFG[#] pins, documented individually in each component’s data sheet. These resistors will differ in a pixel mode default power-up, from a tunnel mode default.
The transition from one mode to another can also be achieved via register writes, regardless of the power-up default configuration.
In terms of layout, there is no impact. Pixel and tunnel mode will operate on the same layout and PCB stack-up.
Conclusion
Understanding the differences between the two modes in GMSL technology is crucial for designing robust, high performance systems. Table 1 provides a side-by-side comparison of some of the features that are supported in pixel and tunnel mode. In simplified terms, pixel mode provides more system flexibility, while tunnel mode enhances data integrity, sacrificing some of the system versatility.
Table 1. Feature Support for Pixel and Tunnel Modes
| Features | Pixel Mode | Tunnel Mode |
| CRC over GMSL | Yes | Yes |
| FEC and CRC over FEC | Yes | Yes |
| End-to-End CSI-2 CRC | No | Yes |
| CSI-2 CRC Monitoring at DES | No | Yes |
| MIPI PHY Translation | Yes | Dependent on component |
| Aggregation | Yes | Yes |
| Virtual Channel Manipulation | Yes | Dependent on component |
| Data Type Conversion | No | No |
Reference
1 GMSL2 General User Guide. Analog Devices, Inc., December 2023.
About the Author
Flavius Luntrașu is a senior field application engineer at Analog Devices, specializing in automotive video connectivity. With over three years of hands-on experience in GMSL technology, he supports OEMs and Tier 1 suppliers in integrating advanced camera systems and display solutions. His role focuses on driving the success of GMSL technology through customer collaboration, codeveloping tailored solutions, and enabling the development of innovative automotive applications.
